Trojan Circuits masking and debugging of combinational circuits with LUT insertion

It is extremely difficult to provide 100% correctness of fabricated high performance circuits. Manufactured circuits may have logical and electrical bugs, Trojan Circuits (TCs) inclusions and so on. Sometimes it is necessary to execute slight correction of the circuit specification. If there is in-field programmability in the circuits, they may be rectified. Here partially programmable circuits are considered. They are derived from gate circuits by covering some sub-circuits by look up tables (LUTs). Some LUTs have one free input and use reserved line. The way of selection of sub-circuits oriented to masking TCs or masking arbitrary logic faults on gate circuit lines is suggested. The selection is based on using observability estimations of internal circuit lines. Note that the internal line observability estimation represents at the same time determined area (its portion in Boolean space) of the incompletely specified Boolean function corresponding to the line. We get the estimations applying operations on ROBDDs. ROBDDs are derived from gate circuit fragments. A combinational circuit (the combinational part of a sequential circuit) from gates is given. We cover its sub-circuits by LUTs either to mask TCs actions or to recover the circuit specification if faults are detected on the last stages of the circuit fabrication. Arbitrary logical faults on lines are possible, several lines may be fault, several TCs may be injected. Algorithm of reprogramming LUTs is developed, some experimental results are given

Finding false paths for sequential circuits using operations on ROBDDs

Performance of VLSI is, first of all, its high operatio

Preventing and masking Trojan Circuits triggering out of working area

Inserting malicious sub-circuits that may cause